9/09 speaker:(english lecture)
本週邀請到美國的Prof. Jean-Luc Gaudiot, EECS, UCI, IEEE Fellow, President-elect of Computer Society,前來進行英語演講。
Prof. Jean-Luc Gaudiot是新任 IEEE Computer Society主席的著名學者,機會難得,敬請踴躍出席。
簡歷如下:JEAN-LUC GAUDIOT Professor,Department of Electrical Engineering and Computer Science University of California
Research Interests
• Programmability of large-scale multiprocessors, distributed structure representation, data caching and nomadic threads, high-level parallel language compilation, allocation, partitioning, and performance evaluation • Processor architecture, implementation and impact of future technologies • Fault-tolerant computing, architecture-level protection of deep sub-micron system against cosmic rays, Single Event Upset (SEU) handling • Benchmarking and characterization of applications, design of flexible architectures tuned for specific types of applications
Education
• Ph.D. in Computer Science (October 1982), University of California, Los Angeles • M.Sc. in Computer Science (June 1977), University of California, Los Angeles • “Diplˆome d’Ing´enieur” (Electrical Engineering Diploma) (June 1976), Ecole Sup´erieure ´ d’Ing´enieurs en Electronique et Electrotechnique, Paris, France
Experience
• PROFESSOR – University of California, Department of Electrical Engineering and Computer Science, Irvine, California (Since January 2002 – Chair from January 2003 to September 2009) • PROFESSOR – University of Southern California, Department of Electrical EngineeringSystems, Los Angeles, California (August 1996 – December 2001) • ASSOCIATE PROFESSOR – University of Southern California, Department of Electrical Engineering-Systems, Los Angeles, California (June 1989 – August 1996) • ASSISTANT PROFESSOR – University of Southern California, Department of Electrical Engineering-Systems, Los Angeles, California (December 1982 – June 1989) • MEMBER OF TECHNICAL STAFF, TRW Technology Research Center, El Segundo, California (August 1980 – November 1982) • SOFTWARE ENGINEER, Teledyne Controls, Santa Monica, California (March 1979 – August 1980)
講題與摘要如下:
Topic: Technology Considerations in Computer Architecture
Abstract:
Good engineering practice uses the characteristics of existing technologies to optimize implementation. Often, this will mean that design techniques optimal in a previous generation prove impractical or even unusable when a new technology becomes dominant. This rule is all too often forgotten, which we will demonstrate in two problems of computer design: Field-Programmable Gate Arrays (FPGA) and hardware prefetchers (providing the ability to fetch data early in anticipation of the need). FPGAs are extremely useful in mobile embedded systems where computing power and energy considerations are major concerns. Partial reconfiguration is often used to reduce power consumption when parts of the array are inactive, albeit at the cost of high energy overhead due to the large cost of transferring configuration information. Our study reveals that partial reconfiguration accelerates execution and reduces overall energy consumption by half. Second, we will demonstrate how increased transistor integration allows hardware prefetching to improve both energy-efficiency and performance.